Developing an Asynchronous Sample Rate Converter
Designing an Asynchronous Sample Rate converter that offers high THD and low ripple across a range of frequencies is no mean achievement. We not only designed the ASRC but implemented it with low MHz on a fixed point processor.
Project scope:
  • Any-to-any fixed Sampling Rate Converter (SRC)
    • 48kHz, 44.1kHz, 32kHz, 24kHz, 22.05kHz, 16kHz, 12kHz, 11.025kHz, 8kHz
  • Asynchronous SRC
    • From a dynamic input rate to a fixed output rate
    • Used with SPDIF input and an external PLL circuit to measure ratio of sampling rates
  • Pass-band upto 0.45fs
  • High quality
    • Low pass band ripple; stop band attenuation upto> 120dB
    • THD+N upto> 100dB
  • Low MHz
    • < 10 Mhz for 48 à 44.1kHz on RISC CPU
    • < 25 MHz for 96 à 44.1kHz on RISC CPU
  • Multi-rate signal processing with poly phase filters
  • Filter design (FIR filters, IIR filters with near-linear phase)
  • Fixed point design for maintaining >100dB SNR
  • Highly optimised assembly implementation