Video codecs on a multi-core highly-parallel custom core
We worked with SiliconHive (now part of Intel) to develop High Definition video codecs that are designed to run optimally on a multi-core environment. Our contribution also included efficient coding for a VLIW core and algorithmic innovations to address memory bandwidth constraints.
  • H.264 30 fps HD (1080 p) decode @ 250 MHz
  • Multi-profile support: Baseline/High
  • HW/SW easily scalable to different resolutions
  • Developed on a multi-core platform
    • Three independent VLIW cores
  • Scalable SIMD elements for vector operations
  • VLIW cores to speed up non-vector code
  • Specialized memories aiding decoder tasks
  • 2-D vector/scalar DMAs
  • Instruction set extensions
    • VLC decode, CABAC, Bit Stream operations
  • 2-D vector/scalar DMAs


  • Multi-core expertise
    • Partitioning
    • Efficient scheduling with different cores, DMA units
  • Algorithmic innovations
    • Reduce memory and BW requirements
    • Efficient usage of VM to implement loop filter
    • Resource scalable Motion Compensation
    • Vectorization techniques to match HW resources
  • New instruction definitions